The latter has an arm reach of 1,000 millimeters that picks the wafers from the cassettes and places them reliably and accurately into the few hundred micrometers larger carbon fiber nests of ...

EFEM Integrated with Nano-Level Precision Stage. The demo started at the point where a cassette of wafers was delivered to the EFEM module. The EFEM detects the wafer cassette position via sensors.

The company also saw a 167% year-on-year increase in profit after tax for the fourth quarter of 2024. This article was updated on May 21 to add details regarding the plant’s location and its ...

AIXTRON SE (OTCPK:AIXXF) Q1 2025 Results Conference Call April 30, 2025 9:00 AM ETCompany ParticipantsChristian Ludwig - Vice President, Investor Relations, ...

The Reddit user who shared the pictures, AVX512-VNNI, claims to have found the wafer near TSMC's Fab 16 factory in Nanjing, China. While not cutting-edge, that fab ...

Jim Byers: Thank you, operator. Good afternoon, and welcome to Aehr Test Systems second quarter fiscal 2025 financial results conference call. With me on today's call are Aehr Test Systems ...

An actual 50 µm thick power discrete wafer with a saw street width of 68 µm was used. An offset laser ablation full-cut sawing process was used to simulate a 30 µm saw street. Results indicate that no ...

For future generations of 10- to 12-V power MOSFETs, the new ultra-thin power wafers enable up to 40% less on-resistance (R DS(on)) than traditional silicon wafers.Thus, they can handle higher ...

Infineon’s wafer technology has been qualified and integrated into its smart power stages, which are now being delivered to initial customers. As the ramp-up of ultra-thin wafer technology progresses, ...

The race is on to implement wafer stacking and die-to-wafer hybrid bonding, now considered essential for stacking logic and memory, 3D NAND, and possibly multi-layer DRAM stacks in HBMs. Vertical ...