A new technical paper titled “Design and Implementation of Test Infrastructure for Higher Parallel Wafer Level Testing of ...

Chip binning' is supposed to be the process of testing newly manufactured silicon to see how many of the important bits work and how high the thing will clock. But TSMC seems to be taking the notion a ...

Intel has run its initial lots of 18A wafers at its Arizona fab, with Fab 52 and Fab 62 pumping out Intel 18A wafers, ahead ...

VNNI, claims to have found the wafer near TSMC's Fab 16 factory in Nanjing, China. While not cutting-edge, that ...

Gayn Erickson, President and CEO of Aehr Test Systems, commented, "We are pleased to have collaborated with the customer on completing initial wafer production testing and to have shipped within ...

This practice is known as "Chip Binning" and while not really part of this practice, a Reddit subscriber happened to find a silicon wafer in the ultimate bin-a garbage can. The foundation of chip ...

Aehr Test Systems (AEHR) has completed shipment of its first FOX-XP wafer level burn-in system for an artificial intelligence (AI) customer, ...

a global provider of semiconductor test and burn-in equipment, has announced the completion of its first FOX-XP™ wafer level burn-in system shipment to a customer in the artificial intelligence ...

AEHR), a worldwide supplier of semiconductor test and burn-in equipment, today announced it has completed shipment of its first FOX-XP wafer level burn-in system for an artificial intelligence (AI) ...