SANTA CLARA, Calif. — Japan's Advantest Corp. here has established a new U.S. R&D center that will help develop a future line of automatic test equipment (ATE) for system-on-a-chip (SoC) designs, ...

Now that FPGAs are changing the system-on-chip road map, SoCs are no longer the sole purview of ASICs. Currently, FPGAs with geometries of 0.18 micron can serve many more commercial applications, ...

Getting the most from system-on-a-chip (SoC) designs requires optimal design of the logic surrounding the embedded processor. As SoCs have increased in complexity, optimizing the interfaces between ...

Driven by such general macro trends such as Internet everywhere, IPeverywhere and Seamless Mobility, in its 15-year assessment ofsemiconductor technology requirements, the International ...

In today’s complex system-on-chip (SoC) design flows, intellectual property (IP) blocks are everywhere—licensed from third parties, leveraged from internal libraries, or hand-crafted by expert teams.

The world of the hardware design engineer has changed dramatically in recent years. Designers no longer sit and code RTL in isolation to meet a paper specification, and then wait for a hardware ...

Semiconductor intellectual property (IP) management, reuse, and change tracking are essential for efficiently creating chip designs based on proven building blocks, reducing your time-to-market, and ...

Pain points of the existing floorplan designing process. How artificial intelligence can optimize this process to reduce the time taken from weeks to just hours. Potential applications of expanding ...