The Camera Link Aligner IP Core is designed for building Frame Grabber (Receiver) Medium & Full Channel Link™ interfaces in conjunction with the SerDes blocks of Altera FPGA devices. The core includes ...

It is designed for building both Camera and Frame Grabber devices. The Camera Link standard is based on Channel Link® technology developed by National Semiconductor. Channel Link uses LVDS technology ...

Communication between with the 1280SciCam and the host PC was performed via the Camera Link protocol with a Bitflow Axion 1xE frame grabber. Featuring a highly deterministic, low latency trigger ...